Start from the governing relation
This is the smallest equation that preserves the physics needed for the formula.
FORMULA / 020
Interactive derivation module for PLL frequency synthesis theory.
Problem Definition
A clock synthesizer must lock quickly without injecting too much reference jitter into the output.
| Symbol | Quantity | Unit | Meaning |
|---|---|---|---|
| $K_d$ | Phase detector gain | V/rad | Converts phase error to control signal. |
| $K_v$ | VCO gain | rad/s/V | Converts control voltage to frequency. |
| $F(s)$ | Loop filter | 依設計而定 | Shapes bandwidth and damping. |
Analytical Derivation
| Item | Assumption |
|---|---|
| Assumption 1 | Linear time-invariant or locally linear behavior is assumed when using transfer functions. |
| Assumption 2 | Parameters are treated as constant over the analysis interval. |
| Assumption 3 | Numerical plots are educational approximations, not full circuit or field solvers. |
This is the smallest equation that preserves the physics needed for the formula.
The model is simplified so the dominant mechanism is visible.
The final form is the one used for design, simulation, or measurement review.
parameter $\to0$dominant term remainsThe formula reduces to its simplest physical behavior.
parameter $\to\infty$parasitics and implementation limits dominateThe closed-form equation becomes a warning rather than a full implementation model.
Parametric Verification
Use the sliders to change the physical parameters and watch the formula expose its behavior. The metric panel keeps sample count and compute latency visible so the visualization remains an engineering instrument, not only a picture.
INTERACTIVE MODULE
Engineering Application
import numpy as np
def pll_error(t, wn, zeta):
wd = wn*np.sqrt(max(1e-6, 1-zeta*zeta))
return np.exp(-zeta*wn*t) * np.cos(wd*t)